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5.4. HARDWARE
channel c annot be allowed to reset the timer upon receipt of an edge as it
would interfere with the results of the second channel), each read will need to
be 16bits long rather than 8bits in order to accommodate a 20ms capture with
sufficient resolution for reliable bit differentiation. Thus, in total four times
the RAM is required to add an additional channel. The PIC 18F452 only has
1.5kB of RAM, which is insufficient. Thus, the PIC 18F4620 which is pin-
compatible and has 4kB of RAM was chosen as a replacement. Unfortunately,
even operating at 32MHz, it was not fast enough to reliably capture the full
16bit timer value between every four edges on both channels simultaneously.
A further option is to clock the two CCP modules from separate timers,
however, this solution has not yet been implemented or evaluated.
5.4.6 Interface
In keeping with Texas Instruments’s Series 2000 system, RS232 was chosen
as the communication method between the RFID readers and the host system.
This ensures that should these reader devices need to be replaced at a later
date by commercial units, no hardware changes to the rest of the system will
be required.
No direct physical user interface is required, apart from a means to trigger
a read cycle (although this too could be a soft command across RS232) it was
decided to use one of the reader microprocessor’s pins as a trigger. When
this pin is pulled high, a read is triggered. Four LEDs have been added
to the reader devices to display the status (Idle, Transmitting, Receiving 1,
Receiving 2).
5.4.7 PCB Layout
The printed circuit board layout is very important as the total gain of the
final analogue receiver design is approximately 3.2 million times (65dB). This
is sufficient for received noise to be amplified into saturation.
For the reader circuit, the digital section was isolated from the analogue
receiver circuitry by using separate supply tracks and ground planes. Every
attempt was made to keep tracks as short as possible and decoupling capacitors
added wherever space permitted.
43
- Low Cost 1
- Penguin RFID Reader 1
- Abstract 2
- Acknowledgements 3
- Declaration 4
- Contents 5
- List of Figures 9
- List of Tables 11
- Glossary 12
- Chapter 1 15
- Introduction 15
- 1.3 Project Timeframe 16
- 1.5 Project Challenges 18
- 1.6 Report Structure 20
- Chapter 2 21
- Analysis of Existing Solution 21
- 2.2 Power Supply 23
- 2.4 Data Delivery 25
- Chapter 3 26
- Device Specification 26
- Chapter 4 29
- Overview of Proposed Solution 29
- 4.3 Uplink Module 31
- 4.4 Interconnections 32
- 4.5 Power Supply 32
- Chapter 5 33
- RFID Reader Design 33
- 5.1.3 Operating Frequency 37
- 5.3.1 64 Data Bits 42
- 5.3.2 CRC Verification 42
- 5.4 Hardware 43
- 5.4. HARDWARE 49
- 5.4.5 Processor 53
- 5.4.6 Interface 56
- 5.4.7 PCB Layout 56
- 5.5 Software 57
- 5.5.2 Capture Stage 58
- 5.5. SOFTWARE 60
- 5.5.3 Decode Stage 61
- 5.6 Design Evaluation 63
- 5.6.4 Power Consumption 67
- Avnett Kopp, September 2006 69
- ZAR9.50 to 1 Euro 69
- Chapter 6 70
- RFID Co-ordinator 70
- 6.2 Software 71
- 6.2.1 Timers 72
- 6.2.2 RFID Reader Request FSM 72
- 6.3 Evaluation 75
- Chapter 7 76
- Uplink Design 76
- 7.3 Hardware Design 80
- 7.3.2 Processor 83
- 7.3.3 User Interface 84
- 7.3.4 Power Supply 85
- 7.4 Software De sign 88
- Except for the I 89
- Details in Section 7.4.5 89
- 7.4.2 Real Time Clock 90
- 7.4.3 User interface 90
- 7.4.4 Peripheral Poll FSM 91
- 7.4.6 Timer FSM 93
- 7.4.7 GSM FSM 94
- 7.4.8 Report Generation FSM 97
- 7.5 Reliability 98
- 7.5.1 Software 99
- 7.5.2 Hardware 100
- Chapter 8 102
- Power Supply 102
- 8.3 Regulator Selection 103
- 8.4.1 Hardware 107
- 40% of 7.5Ah 110
- 8.4.2 Software 111
- 8.5 Measurements 113
- 8.6 Conclusion 114
- Chapter 9 115
- Enclosure Selection and 115
- Mounting Methods 115
- 9.2 Recommendations 116
- Chapter 10 118
- South African Regulations 118
- 10.1 GSM Module 119
- 10.2 RFID Readers 119
- Chapter 11 120
- Conclusion and System 120
- Evaluation 120
- Appendix A 122
- Appendix: RFID Receiver 122
- DUAL-CHANNEL RECEIVER 123
- Appendix B 127
- Appendix: RFID Co-ordinator 127
- B.2. PCB LAYOUT 128
- Appendix C 130
- Appendix: Uplink Module 130
- C.2 List of Uplink Commands 131
- C.3 PCB Design 131
- C.3. PCB DESIGN 133
- Appendix D 137
- Appendix: Power Supply 137
- Appendix E 139
- Appendix: Software 139
- References 140
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