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Wireless CPU

Q24 Series

Interfaces

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prior written agreement.

WM_PRJ_Q24NG_PTS_001-004

January 16, 2007

3.13 Buzzer Output

3.13.1 Hardware Description

The buzzer interface is accessible through an open drain embedded on the Wireless

CPU

Q24 Series.

A buzzer may be directly connected between this output and VBATT.

Equivalent circuit

Pin description

Signal Pin I/O I/O type Description

BUZZER 49 O Analog Buzzer output

Operating conditions

Parameter Condition Min Max Unit

VOL Iol = 100mA 0.4 V

IPEAK VBATT = VBATT Max 100 mA

Caution:

A diode against transient peak voltage must be connected as described below.

Figure 7: Buzzer connection

For the implementation of the buzzer interface, refer to the Customer Design

Guidelines

[6].

Q24 Series

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Wavecom G2 Specifiche Pagina 46